Ac/dc power converter

ABSTRACT

An AC/DC converter including: an H bridge; an inductance in series with an input of the bridge; an inductance in series with an output of the bridge; and a circuit capable of controlling the bridge alternately to a first configuration where first and second diagonals of the bridge are respectively conductive and non-conductive, and to a second complementary configuration, the circuit being capable, during a phase of transition between the first and second configurations, of: turning on a first switch of the second diagonal; turning off a first switch of the first diagonal when the current flowing through this switch takes a zero value; turning on the second switch of the second diagonal; and turning off the second switch of the first diagonal when the current flowing through this switch takes a zero value.

This application claims the priority benefit of French patent application number 17/50209, the content of which is hereby incorporated by reference in its entirety to the maximum extent allowable by law.

BACKGROUND

The present disclosure relates to power converters, and more particularly aims at an AC/DC converter, that is, a converter capable of converting an AC voltage into a DC voltage.

DISCUSSION OF THE RELATED ART

An AC/DC converter conventionally comprises a stage for rectifying the AC voltage applied at its input, comprising one or a plurality of diodes, followed by a stage of low-pass filtering of the rectified AC voltage delivered by the rectifying stage, followed by a stage of DC/DC conversion of the DC voltage delivered by the low-pass filtering stage, typically a switched-mode conversion stage comprising one or a plurality of controlled switches and an isolation transformer.

A disadvantage of converters of this type lies in their relatively high cost and bulk, resulting from the high number of components that they comprise and from the size of these components.

In particular, the low-pass filtering stage conventionally comprises a large capacitor, typically, a capacitor of several tens of microfarads and of several hundreds of volts for a converter intended to receive on its AC input a 220-V AC voltage, for example, the mains voltage.

Further, to limit switching losses in the DC/DC conversion stage, the operating frequency of the conversion stage (or cut-off frequency) is generally limited to a few hundreds of kHz, which limits possibilities of miniaturizing the DC/DC conversion stage, and in particular the isolation transformer.

Another disadvantage of converters of this type is that the presence of the rectifying stage comprising diodes significantly limits the converter efficiency.

Further, in certain applications where the converter is used to power an active DC load, for example, a battery, there is a need for a reversible converter, that is, capable not only of converting the AC input voltage into a DC output voltage to power the load (typically to charge a battery from an AC voltage), but also of converting a DC voltage delivered by the load into an AC voltage supplied on the AC input terminals of the converter (typically to inject back electric power drawn from the battery onto the AC network). Due to their architecture, and particularly due to the presence of the rectifying stage comprising diodes and of the low-pass filtering stage, converters of the type described hereabove do not provide such a reversibility.

U.S. Pat. No. 6,424,548 describes a so-called direct conversion switched-mode AC/DC converter, that is, which comprises no rectifying stage comprising diodes and no low-pass filtering stage upstream of the switched-mode conversion stage. More particularly, this converter comprises four bidirectional switches forming a first controlled H bridge, followed by an isolation transformer comprising a primary winding and a secondary winding, magnetically coupled, followed by four nearly bidirectional switches forming a second controlled H bridge. The input of the first H bridge directly receives the AC voltage to be converted, the primary winding of the transformer is connected between the output terminals of the first H bridge, the secondary winding of the transformer is connected between the input terminals of the second H bridge, and the DC load to be powered is connected between the output terminals of the second H bridge.

An advantage of this converter is that it comprises no rectifying stage comprising diodes and no low-pass filtering stage upstream of the switched-mode conversion stage, which enables to decrease the cost and the bulk and to improve the efficiency as compared with conventional solutions. Further, this converter is reversible.

However, as in conventional converters, switching losses in the switched-mode conversion stage in practice prevent the increase of the switching frequency of the switches beyond a few hundreds of kHz, which limits possibilities of miniaturizing the system, and in particular the isolation transformer.

It would be desirable to have an AC/DC converter overcoming all or part of the above-mentioned disadvantages of existing converters.

SUMMARY

Thus, an embodiment provides a AC-voltage-to-DC-voltage conversion circuit, comprising:

four first bidirectional switches forming a first H bridge, first and second input nodes of the bridge being respectively coupled to first and second nodes of application of the AC voltage;

a transformer comprising a primary winding and a secondary winding, magnetically coupled, first and second ends of the primary winding being respectively coupled to first and second output nodes of the first bridge;

a first inductance series-connected with the first bridge between the first input node of the bridge and the first node of application of the AC voltage;

a second inductance series-connected with the first bridge, between the first output node of the bridge and the first end of the primary winding; and

a control circuit capable of controlling the first bridge alternately to a first configuration where the switches of a first diagonal of the bridge are on and the switches of a second diagonal of the bridge are off, and to a second configuration where the switches of the first diagonal are off and the switches of the second diagonal are on,

the control circuit being capable, during a phase of transition between the first and second configurations, of successively:

turning on a first switch of the second diagonal;

turning off a first switch of the first diagonal when the current flowing through this switch takes a zero value;

turning on the second switch of the second diagonal; and

turning off the second switch of the first diagonal when the current flowing through this switch takes a zero value.

According to an embodiment, the conversion circuit further comprises four second switches forming a second H bridge, first and second input nodes of the second bridge being respectively coupled to first and second ends of the secondary winding of the transformer, and first and second output nodes of the second bridge being respectively coupled to first and second DC voltage supply nodes.

According to an embodiment, the control circuit is capable of controlling the second bridge alternately to a first configuration where the switches of a first diagonal of the bridge are on and the switches of a second diagonal of the bridge are off, and to a second configuration where the switches of the first diagonal are off and the switches of the second diagonal are on.

According to an embodiment, the control circuit is configured to switch the first bridge between its first and second configurations and to switch the second bridge between its first and second configurations substantially at the same frequency.

According to an embodiment, the control circuit is configured to switch the first bridge between its first and second configurations at a frequency greater than or equal to 1 MHz.

According to an embodiment, each first switch is capable of being controlled to the on state by the control circuit and to automatically turn off when the current flowing therethrough takes a zero value.

According to an embodiment, each first switch is equivalent to an anti-series association of first and second MOS transistors connected by their drains, the sources of the first and second transistors respectively forming the conduction nodes of the switch, and the gates of the first and second MOS transistors forming first and second switch control nodes.

According to an embodiment, the control circuit is configured to, when it controls a switch of the first bridge to the on state, apply a turn-on control signal to the gate of one of the first and second transistors of the switch and hold a blocking signal on the gate of the other transistor.

According to an embodiment, the control circuit is configured to, when it controls a switch of the first bridge to the on state, apply a turn-on control signal to the gate of the first transistor and a turn-off signal to the gate of the second transistor when the current to be conducted by the switch has a first biasing, and apply a turn-on control signal to the gate of the second transistor and a turn-off signal to the gate of the first transistor when the current to be conducted by the switch has a second biasing opposite to the first biasing.

According to an embodiment, the first switches are gallium nitride switches.

Another embodiment provides AC-voltage-to-DC-voltage conversion circuit, comprising:

four first bidirectional switches forming a first H bridge, first and second input nodes of the bridge being directly coupled respectively to first and second nodes of application of the AC voltage;

a first capacitor connected in parallel with the first bridge between the first and second input nodes of the bridge;

a second capacitor connected in parallel with the first bridge between first and second output nodes of the bridge; and

a control circuit capable of controlling the bridge alternately to a first configuration where the switches of a first diagonal of the bridge are on and the switches of a second diagonal of the bridge are off, and to a second configuration where the switches of the first diagonal are off and the switches of the second diagonal are on,

the control circuit being capable, during a phase of transition between the first and second configurations, of successively:

turning off the switches of the first diagonal; and

for each switch of the second diagonal, turning on the switch only when the voltage thereacross takes a zero value.

According to an embodiment, the conversion circuit further comprises four additional capacitors respectively connected across the four first switches.

According to an embodiment, the conversion circuit further comprises a transformer comprising a primary winding and a secondary winding, magnetically coupled, first and second ends of the primary winding being respectively coupled to first and second output nodes of the first bridge.

According to an embodiment, the conversion circuit further comprises four second switches forming a second H bridge, first and second input nodes of the second bridge being respectively coupled to first and second ends of the secondary winding of the transformer, and first and second output nodes of the second bridge being respectively coupled to first and second DC voltage supply nodes.

According to an embodiment, the control circuit is capable of controlling the second bridge alternately to a first configuration where the switches of a first diagonal of the bridge are on and the switches of a second diagonal of the bridge are off, and to a second configuration where the switches of the first diagonal are off and the switches of the second diagonal are on.

According to an embodiment, the control circuit is configured to switch the first bridge between its first and second configurations and to switch the second bridge between its first and second configurations substantially at the same frequency.

According to an embodiment, the control circuit is configured to switch the first bridge between its first and second configurations at a frequency greater than or equal to 1 MHz.

According to an embodiment, the control circuit comprises, for each first switch:

a first circuit capable of detecting that the voltage across the switch has taken a zero value and of supplying a logic output signal corresponding to the result of this detection;

a second circuit capable of performing a logic operation between the signal supplied by the first circuit and an external switch control signal, and of supplying a logic switch control signal corresponding to the result of this operation; and

a third circuit capable of adapting the level of the signal supplied by the second circuit to accordingly control the switch.

According to an embodiment, each first switch is equivalent to an anti-series association of first and second MOS transistors connected by their sources, the drains of the first and second transistors respectively forming the conduction nodes of the switch, and the gates of the first and second MOS transistors being connected to a same switch control node.

According to an embodiment, the first circuit comprises a voltage comparator, a first voltage dividing bridge coupled between the drain and source nodes of the first transistor and having an output node coupled to a positive input node of the comparator, and a second voltage dividing bridge coupled between the drain and source nodes of the second transistor and having an output node coupled to a negative input node of the comparator.

According to an embodiment, the first switches are gallium nitride switches.

The foregoing and other features and advantages will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a wiring diagram of an example of an AC/DC converter according to a first embodiment;

FIG. 2 is a timing diagram illustrating the operation of the converter of FIG. 1;

FIG. 3 is a block diagram illustrating an embodiment of a switch control circuit of the converter of FIG. 1;

FIG. 4 is a more detailed diagram of an embodiment of a switch of the converter of FIG. 1 and of the circuit for controlling this switch;

FIG. 5 is a wiring diagram of an example of an AC/DC converter according to a second embodiment;

FIG. 6 is a timing diagram illustrating the operation of the converter of FIG. 5;

FIGS. 7A and 7B illustrate an embodiment of a switch of the converter of FIG. 5;

FIG. 8 schematically and partially illustrates an embodiment of a control circuit of the converter of FIG. 5; and

FIG. 9 is a more detailed electric diagram of an embodiment of the control circuit of FIG. 8.

DETAILED DESCRIPTION

The same elements have been designated with the same reference numerals in the various drawings and, further, the various drawings are not to scale. For clarity, only those steps and elements which are useful to the understanding of the described embodiments have been shown and are detailed. In particular, the applications which may be made of the described AC/DC converters have not been detailed, the described embodiments being compatible with usual AC/DC converter applications. Further, the switch control circuits of the described converters are only partially detailed, the total forming of such control circuits being within the abilities of those skilled in the art based on the indications of the present description. Unless otherwise specified, expressions “approximately”, “substantially”, and “in the order of” mean to within 10%, preferably to within 5%. Further, term “connected” is used to designate a direct electric connection, with no intermediate electronic component, for example, by means of one or a plurality of conductive tracks or conductive wires, and term “coupled” or term “linked” is used to designate an electric connection which may be direct (then meaning “connected”) or indirect (that is, via one or a plurality of intermediate components).

First Embodiment—Capacitive Structure

FIG. 1 is a wiring diagram of an example of an AC/DC converter 100 according to a first embodiment.

Converter 100 comprises a first controlled H bridge H1, or primary bridge, followed by an isolation transformer T, followed by a second controlled H bridge H2, or secondary bridge.

Bridge H1 is formed of four switches, bidirectional in terms of current and of voltage, S1, S2, S3, and S4, for example, identical (to within manufacturing dispersions), each comprising two main conduction nodes and at least one control node. Switches S1 and S4 are series-coupled, by their conduction nodes, between input nodes C and D of the bridge. Switches S2 and S3 are series-coupled, by their conduction nodes, between nodes C and D, in parallel with the branch comprising switches S1 and S4. Junction point E of switches S1 and S4 defines a first output node of the bridge, and junction point F of switches S2 and S3 defines a second output node of the bridge. More particularly, in the shown example, switch S1 has a first conduction node connected to node C and a second conduction node connected to node E, switch S4 has a first conduction node connected to node E and a second conduction node connected to node D, switch S2 has a first conduction node connected to node C and a second conduction node connected to node F, and switch S3 has a first conduction node connected to node F and a second conduction node connected to node D.

Input nodes C and D of bridge H1 are directly coupled, that is, with no intermediate rectifying stage comprising diodes and no low-pass filtering stage, to nodes A and B of application of the AC input voltage of the converter. Low-pass filtering stage here means a low-pass filtering stage having a cut-off frequency approximately equal to or smaller than the frequency of the AC input voltage of the converter. Low-pass filtering elements with a higher cut-off frequency may however be provided, particularly to filter possible parasitic signals generated during the switching of the switches of bridge H1. More particularly, in this example, node C is coupled to node A via an inductance 11, and node D is connected to node B. Inductance 11 has the function of filtering possible parasitic voltage peaks generated during the switching of the switches of bridge H1. In the shown example, inductance 11 has a first end connected to node A and a second end connected to node C. As a variation, inductance 11 may be omitted, node C then being connected to node A.

According to an aspect of the first embodiment, primary bridge H1 is purely capacitive at its input and at its output. More particularly, converter 100 comprises a capacitor CI having its electrodes respectively connected to input nodes C and D of bridge H1, and a capacitor CO having its electrodes respectively connected to output nodes E and F of bridge H1. It should be noted that such a layout is unusual. Indeed, in power electronics, passive electric power exchange elements of different natures are generally provided at the input and at the output of a same H bridge, to respect source association rules.

In this example, converter 100 further comprises four capacitors C1, C2, C3, C4, for example, identical (to within manufacturing dispersions), respectively coupled in parallel with switches S1, S2, S3, S4 of bridge H1. More particularly, each capacitor Ci, i being an integer in the range from 1 to 4, has its electrodes respectively connected to the conduction nodes of the switch Si having the same index i.

Transformer T comprises a primary winding W1 and a secondary winding W2, magnetically coupled.

Ends G and H of primary winding W1 are respectively coupled to output nodes E and F of bridge H1. More particularly, in the shown example, end G of primary winding W1 is coupled to node E via an inductance 12, and end H of primary winding W1 is connected to node F. Inductance 12 has the function of filtering possible parasitic voltage peaks. In the shown example, inductance 12 has a first end connected to node G and a second end connected to node E. As a variation, inductance 12 may be omitted, node G then being connected to node E.

Bridge H2 is formed of four controlled switches S5, S6, S7, and S8, for example, identical (to within manufacturing dispersions), each comprising two main conduction nodes and at least one control node. Switches S5, S6, S7, and S8 are for example nearly bidirectional switches, that is, switches capable of conducting current in both directions, but only enabling to control the current in one direction, that is, which can only be controlled to the off state when a voltage having a determined biasing is applied between their conduction nodes (in other words, switches which are bidirectional in terms of current but unidirectional in terms of voltage). As a variation, switches S5, S6, S7, S8 are bidirectional in terms of current and of voltage. Switches S5 and S8 are series-coupled, by their conduction nodes, between input nodes K and L of the bridge. Switches S6 and S7 are series-coupled, by their conduction nodes, between nodes K and L, in parallel with the branch comprising switches S5 and S8. Junction point M of switches S5 and S8 defines a first output node of the bridge, and junction point N of switches S6 and S7 defines a second output node of the bridge. More particularly, in the shown example, switch S5 has a first conduction node connected to node L and a second conduction node connected to node M, switch S8 has a first conduction node connected to node M and a second conduction node connected to node K, switch S6 has a first conduction node connected to node L and a second conduction node connected to node N, and switch S7 has a first conduction node connected to node N and a second conduction node connected to node K.

Input nodes K and L of bridge H2 are respectively coupled to ends I and J of secondary winding W2 of transformer T. In the shown example, end I of winding W2 is connected to node K and end J of winding W2 is connected to node L.

Converter 100 further comprises an output filtering capacitor CF, at the output of bridge H2. In the shown example, the electrodes of capacitor CF are respectively connected to output nodes M and N of bridge H2.

Output nodes M and N of bridge H2 are respectively coupled to nodes O and P supplying the DC output voltage of converter 100. In the shown example, node M is connected to node O and node N is connected to P.

Converter 100 further comprises a circuit 101 (not detailed) for controlling switches S1, S2, S3, S4, S5, S6, S7 and S8 of bridges H1 and H2.

In operation, a load L to be powered, for example, an electric battery, may be connected between output nodes O and P of the converter.

Converter 100 operates as follows: Circuit 101 controls primary bridge H1 alternately to a first configuration where switches S1 and S3, defining a first diagonal of the bridge, are on and switches S2 and S4, defining a second diagonal of the bridge, are off, and to a second configuration where switches S1 and S3 are off and switches S2 and S4 are on. The frequency of the switching of bridge H1 between the first and second configurations, called cut-off frequency, is preferably selected to be much higher than the frequency of the AC voltage to be converted, for example, in the range from 200 kHz to 20 MHz for an input frequency in the range from 20 to 100 Hz. Duty cycle ϕH1 of the switching between the first and second configurations of bridge H1 is for example approximately equal to 0.5.

Circuit 101 further controls secondary bridge H2 alternately to a first configuration where switches S5 and S7, defining a first diagonal of the bridge, are on and switches S6 and S8, defining a second diagonal of the bridge, are off, and to a second configuration where switches S5 and S7 are off and switches S6 and S8 are on. The frequency of the switching of bridge H2 between the first and second configurations is substantially equal to the switching frequency of bridge H1. On switching from the first configuration to the second configuration, circuit 101 may further control bridge H2 to a first intermediate configuration where switches S5 and S8 are on and switches S6 and S7 are off. Further, on switching from the second configuration to the first configuration, circuit 101 may control bridge H2 to a second intermediate configuration where switches S5 and S8 are off and switches S6 and S7 are on.

Duty cycle ϕH2 of the switching between the first and second configurations of bridge H2 may however be different from duty cycle ϕH1 of the primary bridge. Further, a phase shift δH1H2 may be provided between the control sequence of primary bridge H1 and the control sequence of secondary bridge H2.

By varying parameters ϕH2 and δH1H2, circuit 101 regulates the DC output voltage of converter 100, and/or the current sampled from the source of AC converter power supply voltage, for example, to ensure a sinusoidal absorption of the current supplied by the AC source.

Further, the converter of FIG. 1 is reversible. Thus, in the case where an active load L, for example, a battery, is connected to the converter output, circuit 101 may, by varying the above-mentioned parameters ϕH1, ϕH2 and/or δH1H2, control a DC/AC electric power transfer from DC load L to the AC input of the converter.

According to an aspect of the first embodiment, control circuit 101 is configured to, during phases of transition between the first configuration (diagonal S1, S3 conductive and diagonal S2, S4 non-conductive) and the second configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive) of primary bridge H1, only turn on switches S2 and S4 when the voltage thereacross takes a value zero and, during phases of transition between the second configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive) and the first configuration (diagonal S1, S3 conductive and diagonal S2, S4 non-conductive) of bridge H1, only turn on switches S1 and S3 when the voltage thereacross takes a zero value.

This enables to significantly limit switching losses in primary bridge H1. The cut-off frequency of the converter may then be selected to be relatively high, for example, greater than 1 MHz or even greater than 10 MHz, which enables to significantly decrease the dimensions of isolation transformer T.

In a preferred embodiment, switches S1, S2, S3, S4 of the primary bridge H1 and switches S5, S6, S7, S8 of secondary bridge H2 are gallium nitride switches, for example, switches of the type described in patent application EP2736078 previously filed by the applicant, or in the article entitled “The single reference Bi-Directional GaN HEMT AC switch” by D. Bergogne et al. (Power Electronics and Applications (EPE′15 ECCE-Europe). Gallium nitride switches are indeed capable of operating at high switching frequencies with no risk of damage. The described embodiments are however not limited to this specific example.

FIG. 2 is a timing diagram illustrating the operation of converter 100 of FIG. 1 during a phase of transition from the first configuration (diagonal S1, S3 conductive and diagonal S2, S4 non-conductive) to the second configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive) of primary bridge H1.

More particularly, the timing diagram of FIG. 2 comprises a first curve V_(CO) showing the time variation of voltage V_(CO) across output capacitor CO of primary bridge H1, a second curve V_(S1) showing the time variation of voltage V_(S1) across switch S1, and a third curve V_(S2) showing the time variation of voltage V_(S2) across switch S2.

The example of FIG. 2 considers an initial time t0 at which primary bridge H1 is in the first configuration. Switches S1 and S3 are then on and switches S2 and S4 off, and voltage V_(CO) across capacitor CO is substantially equal to value V_(e) of the AC input voltage of the converter at the considered time, in the order of 200 volts in the shown example. Given that the converter cut-off frequency is much higher than the AC input voltage of the converter, the AC input voltage is considered as constant during the entire duration of a phase of transition between the first and second configurations of bridge H1. At time t0, voltage V_(S1) across switch S1 is substantially zero (switch S1 on) and voltage V_(S2) across switch S2 is substantially equal to value V_(e) (switch S2 off).

At a time t1 subsequent to time t0, marking the beginning of a phase of transition between the first and second configurations of primary bridge H1, circuit 101 controls switches S1 and S3 to the off state, while holding switches S2 and S4 in the off state. To ensure the continuity of the current flowing through inductance 12 and/or through the inductance formed by winding W1 of transformer T, capacitor CO then fully discharges, to a zero value, and then negatively charges to value −V_(e). During the phase of discharge and then of negative charge of capacitor CO, voltage V_(S1) across switch S1 increases to reach value V_(e) and voltage V_(S2) across switch S2 decreases to a zero value.

Control circuit 101 is configured to detect that voltage V_(S2) across switch S2 has taken a zero value after time t1 of turning off of switches S1 and S3, and to control switch S2 to the on state when it is detected that voltage V_(S2) has taken a zero value.

Thus, at a time t2 subsequent to time t1, corresponding to the time at which the voltage across switch S2 has taken a zero value, circuit 101 controls switch S2 to the on state.

It should be noted that voltages V_(S3) and V_(S4) across switches S3 and S4 have not been shown in FIG. 2, these voltages having substantially the same variation as voltages V_(S1) and V_(S2), respectively.

Time t2 marks the end of the phase of transition between the first and second configurations of primary bridge H1. Switches S2 and S4 are then on and switches S1 and S3 are off, and voltage V_(CO) across capacitor CO is substantially equal to value −V_(e), in the order of −200 Volts in the shown example. At time t2, voltage V_(S2) across switch S2 is substantially zero and voltage V_(S1) across switch S1 is substantially equal to value V_(e).

The operation of converter 100 during phases of transition from the second configuration (diagonal S1, S3 off and diagonal S2, S4 on) to the first configuration (diagonal S1, S3 on and diagonal S2, S4 off) of primary bridge H1 is similar to which has just been described, that is, circuit 101 first controls switches S2 and S4 to the off state, while holding switches S1 and S3 in the off state, and then monitors the voltage across switches S1 and S3 to only control switches S1 and S3 to the off state when the voltage thereacross takes a zero value.

FIG. 3 schematically and partially illustrates an embodiment of control circuit 101 of converter 100 of FIG. 1. FIG. 3 more particularly illustrates a switch S1 of primary bridge H1 of the converter, as well as a control circuit associated with this switch. The control circuit shown in FIG. 3 corresponds to a portion of control circuit 101 of FIG. 1. As an example, each of switches S1, S2, S3, S4 of primary bridge H1 of the converter is associated with a specific control circuit of the type described in relation with FIG. 3.

The control circuit of FIG. 3 comprises, coupled to switch S1 by its main conduction nodes, a circuit 301 for detecting the switching to a zero value or to a value considered as zero of the voltage across switch Si. Stage 301 supplies a logic output signal indicating whether the voltage across switch S1 is or not considered as zero.

The control circuit of FIG. 3 further comprises a circuit 303 receiving the logic output signal of stage 301, and further receiving an external control signal CMD_(EXT), supplied by a centralized control circuit (not detailed) of circuit 101 of FIG. 1. Circuit 303 carries out a logic operation between the output signal of circuit 301 and external control signal CMD_(EXT), and supplies a logic signal for controlling switch Si, corresponding to the result of this operation. As an example, to switch bridge H1 from the first configuration (diagonal S1, S3 conductive and diagonal S2, S4 non-conductive) to the second configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive), the centralized control circuit of circuit 101 simultaneously sends an order to turn off switch S1, an order to allow the turning on of switch S2, an order to turn off switch S3, and an order to allow the turning on of switch S4, via inputs CMD_(EXT) of circuits 303 associated with switches S1, S2, S3, and S4, respectively. Similarly, to switch bridge H1 from the first configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive) to the second configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive), the centralized control circuit of circuit 101 simultaneously sends an order to turn on switch S1, an order to turn off switch S2, an order to allow the turning on of switch S3, and an order to allow the turning off of switch S4, via inputs CMD_(EXT) of the circuits 303 associated with switches S1, S2, S3, and S4, respectively.

For each switch Si, when the circuit 303 associated with the switch receives an order to turn off the switch, it directly applies a turn-off control signal on its output, without taking into account the output signal of circuit 301.

When the logic circuit 303 associated with a switch Si receives an order to allow the tuning on of switch, it starts by holding on its output a signal for controlling the switch to the off state as long as the output signal of circuit 301 does not indicate that the voltage across the switch has taken a zero value, after which it applies on its output a signal for controlling switch Si to the on state only when the output signal of circuit 301 indicates that the voltage across the switch has taken a zero value.

The control circuit of FIG. 3 further comprises a circuit 305 for adapting the level of the control signal of switch Si, for example, a voltage and/or current amplifier (to be able to charge the gate in the case of a MOS switch), having its input coupled to the output of circuit 303 and having its output coupled to a control node of switch Si. Circuit 305 is capable of transposing the logic control signal supplied by circuit 303 into a signal having a level capable of effectively controlling the switch.

FIG. 4 is a more detailed diagram of an embodiment of the circuit of FIG. 3. The circuit of FIG. 4 shows the same elements as the circuit of FIG. 3, and illustrates in further detail an embodiment of switch Si and of circuit 301 for detecting that the voltage across switch Si has taken a zero value.

In this example, a switch Si equivalent to two MOS transistors M1 and M2 connected in anti-series by their sources (s) is considered. The drains (d) of transistors M1 and M2 respectively form the two conduction nodes K1 and K2 of switch Si. The gates (g) of transistors M1 and M2 are connected at a node CMD forming the control node of switch Si. Node REF, common to the sources (s) of transistors M1 and M2, forms a reference node of the switch, having the control signal applied to node CMD referenced thereto.

Circuit 301 comprises a first resistive voltage dividing bridge comprising a resistor r1 in series with a resistor r2, supplying an attenuated image of the drain-source voltage of transistor M1, and a second resistive voltage dividing bridge comprising a resistor r1′ in series with a resistor r2′, supplying an attenuated image of the drain-source voltage of transistor M2. In this example, resistor r1 has a first end connected to node K1 and a second end connected to a node Q, and resistor r2 has a first end connected to node Q and a second end connected to node REF. Further, in this example, resistor r1′ has a first end connected to node K2 and a second end connected to a node R, and resistor r2′ has a first end connected to node R and a second end connected to node REF. As an example, resistors r1 and r1′ are identical, and resistors r2 and r2′ are identical (to within manufacturing dispersions).

Circuit 301 further comprises a voltage comparator 421 referenced to node REF. Output node Q of the first voltage dividing bridge (r1, r2) is coupled to the positive input (+) of comparator 421, and output node R of the second voltage dividing bridge (r1′, r2′) is coupled to the negative input (−) of comparator 421.

The output of comparator 421 forms the output of circuit 301, coupled to the input of circuit 303 (also referenced to node REF). As previously described in relation with FIG. 3, the output of circuit 303 is coupled to the input of amplification stage 305, the output of amplification stage 305 being coupled to control node CMD of switch Si.

It should be noted that in the example of FIG. 4, the entire chain of control of switch Si, from the detection of the zero crossing of the voltage across the switch to the effective control of the switch, has the same reference potential, that is, the potential of reference node REF of the switch. Thus, the control circuit of FIG. 4 comprises no isolation element, which enables the circuit to be highly responsive. In particular, this enables to control with no significant delay the turning on of switch Si when the voltage thereacross takes a zero value, and thus to maintain switching losses in the switch at a very low level.

It should be noted that in the embodiment of FIG. 1, capacitors C1, C2, C3, C4 enable to slow down voltage variations across switches S1, S2, S3, S4 of primary bridge H1 during switching operations, to ease the detection of the zero crossing of the voltage thereacross. As a variation, these capacitors may be omitted.

Second Embodiment—Inductive Structure

FIG. 5 is a wiring diagram of an example of an AC/DC converter 500 according to a second embodiment.

Converter 500 comprises a first controlled H bridge H1, or primary bridge, followed by an isolation transformer T, comprising a primary winding W1 and a secondary winding W2, magnetically coupled, followed by a second controlled H bridge H2, or secondary bridge.

Bridge H1 is formed of four switches, bidirectional in terms of current and of voltage, S1, S2, S3, and S4, for example, identical (to within manufacturing dispersions), each comprising two main conduction nodes and at least one control node. Switches S1 and S4 are series-coupled, by their conduction nodes, between input nodes C and D of the bridge. Switches S2 and S3 are series-coupled, by their conduction nodes, between nodes C and D, in parallel with the branch comprising switches S1 and S4. Junction point E of switches S1 and S4 defines a first output node of the bridge, and junction point F of switches S2 and S3 defines a second output node of the bridge. More particularly, in the shown example, switch S1 has a first conduction node connected to node C and a second conduction node connected to node E, switch S4 has a first conduction node connected to node E and a second conduction node connected to node D, switch S2 has a first conduction node connected to node C and a second conduction node connected to node F, and switch S3 has a first conduction node connected to node F and a second conduction node connected to node D.

Input nodes C and D of bridge H1 are directly coupled, that is, with no intermediate rectifying stage comprising diodes and no low-pass filtering stage, to nodes A and B of application of the AC input voltage of the converter.

Output nodes E and F of bridge H1 are coupled to ends G and H of primary winding W1 of transformer T.

According to an aspect of the second embodiment, primary bridge H1 is purely inductive at its input and at its output. More particularly, converter 500 comprises an inductance LI series-connected with the bridge, via input nodes C and D of the bridge, between nodes A and B of application of the AC input voltage of the converter, and an inductance LO series-connected with the bridge, via output nodes E and F of the bridge, between ends G and H of primary winding W1 of transformer T. In the shown example, inductance LI has a first end connected to node C and a second end connected to node A, and node D is connected to node B. Further, in this example, inductance LO has a first end connected to node E and a second end connected to node G, and node F is connected to node H. In the embodiment of FIG. 5, the converter comprises no capacitive element connected at the input of bridge H1, between nodes C and D, and comprises no capacitive element connected at the output of bridge H1, between nodes, E and F, either. It should be noted that here again, such a layout is unusual. Indeed, in power electronics, passive electric power exchange elements of different natures are generally provided at the input and at the output of a same H bridge, to respect source association rules.

Bridge H2 is formed of four controlled switches S5, S6, S7, and S8, for example, identical (to within manufacturing dispersions), each comprising two main conduction nodes and at least one control node. Switches S5, S6, S7, and S8 are for example nearly bidirectional switches, that is, switches capable of conducting current in both directions, but only enabling to control the current in one direction (in other words, switches which are bidirectional in terms of current but unidirectional in terms of voltage). As a variation, switches S5, S6, S7, S8 are bidirectional in terms of current and of voltage. Switches S5 and S8 are series-coupled, by their conduction nodes, between input nodes K and L of the bridge. Switches S6 and S7 are series-coupled, by their conduction nodes, between nodes K and L, in parallel with the branch comprising switches S5 and S8. Junction point M of switches S5 and S8 defines a first output node of the bridge, and junction point N of switches S6 and S7 defines a second output node of the bridge. More particularly, in the shown example, switch S5 has a first conduction node connected to node L and a second conduction node connected to node M, switch S8 has a first conduction node connected to node M and a second conduction node connected to node K, switch S6 has a first conduction node connected to node L and a second conduction node connected to node N, and switch S7 has a first conduction node connected to node N and a second conduction node connected to node K.

Input nodes K and L of bridge H2 are respectively coupled to ends I and J of secondary winding W2 of transformer T. In the shown example, end I of winding W2 is connected to node K and end J of winding W2 is connected to node L.

Converter 500 further comprises an output filtering capacitor CF, at the output of bridge H2. In the shown example, the electrodes of capacitor CF are respectively connected to output nodes M and N of bridge H2.

Output nodes M and N of bridge H2 are respectively coupled to nodes O and P supplying the DC output voltage of converter 500. In the shown example, node M is connected to node O and node N is connected to node P.

Converter 500 further comprises a circuit 501 (not detailed) for controlling switches S1, S2, S3, S4, S5, S6, S7 and S8 of bridges H1 and H2.

In operation, a load L to be powered, for example, an electric battery, may be connected between output nodes O and P of the converter.

Converter 500 operates as follows: Circuit 501 controls primary bridge H1 alternately to a first configuration where switches S1 and S3, defining a first diagonal of the bridge, are on and switches S2 and S4, defining a second diagonal of the bridge, are off, and to a second configuration where switches S1 and S3 are off and switches S2 and S4 are on. As in the first embodiment, the frequency of the switching of bridge H1 between the first and second configurations, or cut-off frequency, is preferably selected to be much higher than the frequency of the AC voltage to be converted, for example, in the range from 200 kHz to 20 MHz for an input frequency in the range from 20 to 100 Hz. Duty cycle ϕH1 of the switching between the first and second configurations of bridge H1 is for example approximately equal to 0.5.

Circuit 501 further controls secondary bridge H2 alternately to a first configuration where switches S5 and S7, defining a first diagonal of the bridge, are on and switches S6 and S8, defining a second diagonal of the bridge, are off, and to a second configuration where switches S5 and S7 are off and switches S6 and S8 are on. The frequency of the switching of bridge H2 between the first and second configurations is substantially equal to the switching frequency of bridge H1. Duty cycle ϕH2 of the switching between the first and second configurations of bridge H2 may however be different from duty cycle ϕH1 of the primary bridge. Further, a phase shift δH1H2 may be provided between the control sequence of primary bridge H1 and the control sequence of secondary bridge H2.

As in the first embodiment, by varying parameters ϕH2 and δH1H2, circuit 501 regulates the DC output voltage of converter 500, and/or the current sampled from the converter AC power supply voltage source, for example, to ensure a sinusoidal absorption of the current supplied by the AC source.

Further, as in the first embodiment, the converter of FIG. 5 is reversible. Thus, in the case where an active load L, for example, a battery, is connected to the converter output, circuit 501 may, by varying the above-mentioned parameters ϕH1, ϕH2 and/or δH1H2, control a DC/AC electric power transfer from DC load L to the AC input of the converter.

According to an aspect of the second embodiment, control circuit 501 is configured to, during phases of transition between the first configuration (diagonal S1, S3 conductive and diagonal S2, S4 non-conductive) and the second configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive) of primary bridge H1, only turn off switches S1 and S3 when the current flowing therethrough takes a zero value and, during phases of transition between the second configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive) and the first configuration (diagonal S1, S3 conductive and diagonal S2, S4 non-conductive) of bridge H1, only turn off switches S2 and S4 when the current flowing therethrough takes a zero value.

This enables to significantly limit switching losses in primary bridge H1. The cut-off frequency of the converter may then be selected to be relatively high, for example, greater than 1 MHz or even greater than 10 MHz, which enables to significantly decrease the dimensions of isolation transformer T.

In a preferred embodiment, switches S1, S2, S3, S4 of the primary bridge H1 and switches S5, S6, S7, S8 of secondary bridge H2 are gallium nitride switches. The described embodiments are however not limited to this specific example.

FIG. 6 is a timing diagram illustrating the operation of converter 500 of FIG. 5 during a phase of transition from the first configuration (diagonal S1, S3 conductive and diagonal S2, S4 non-conductive) to the second configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive) of primary bridge H1.

More particularly, the timing diagram of FIG. 6 comprises a first curve I_(LO) showing the time variation of current I_(LO) flowing through output inductance LO of primary bridge H1, a second curve I_(S1) showing the time variation of current I_(S1) flowing through switch S1, and a third curve I_(S2) showing the time variation of current I_(S2) flowing through switch S2.

The example of FIG. 6 considers an initial time t0 at which primary bridge H1 is in the first configuration. Switches S1 and S3 are then on and switches S2 and S4 are off, and current I_(LO) flowing through inductance LO is substantially equal to the current I_(e) flowing through input inductance LI of bridge H1 at the considered time. Given that the converter cut-off frequency is much higher than the AC input voltage of the converter, the AC input current I_(e) is considered as constant during the entire duration of a phase of transition between the first and second configurations of bridge H1. At time t0, current I_(S1) in switch S1 is substantially equal to input current I_(e) (switch S1 on), and current I_(S2) in switch S2 has a substantially zero value (switch S2 off). Further, current I_(S3) (not shown) in switch S3 is substantially equal to input current I_(e), and current I_(S4) (not shown) in switch S4 has a substantially zero value.

At a time t1 subsequent to time t0, marking the beginning of a phase of transition between the first and second configurations of primary bridge H1, circuit 501 controls switch S2 to the on state, while holding switches S1 and S3 in the on state and switch S4 in the off state. Inductance LO then discharges until the current flowing through primary winding W1 of the transformer, and thus current I_(S1) flowing through switch S1, takes a zero value. At the same time, current I_(S2) increases to reach value I_(e).

Switch S1 is configured to automatically turn off when the current flowing therethrough takes a zero value. At a time t2 subsequent to time t1, switch S1 turns off.

At a time t3 subsequent to time t2, circuit 501 controls switch S4 to the on state, while holding switches S2 and S3 in the on state and switch S1 in the off state. Inductance LO then negatively charges until the current flowing therethrough reaches value −I_(e). At the same time, current I_(S4) flowing through switch S4 increase to reach value I_(e), and current I_(S3) flowing through S3 decreases until it takes a zero value.

Switch S3 is configured to automatically turn off when the current flowing therethrough takes a zero value. Thus, at a time t4 subsequent to time t3, switch S3 turns off.

Time t4 marks the end of the phase of transition between the first and second configurations of primary bridge H1. Switches S2 and S4 are then conductive and switches S1 and S3 are non-conductive.

The operation of converter 500 during phases of transition from the second configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive) to the first configuration (diagonal S1, S3 conductive and diagonal S2, S4 non-conductive) of primary bridge H1 is similar to what has just been described, that is, circuit 501 first controls switch S1 to the on state while holding switches S2 and S4 in the off state and switch S3 in the off state and then, after the automatic turning off of switch S2, it controls switch S3 to the on state while holding switches S1 and S4 in the on state and switch S2 in the off state, until the automatic turning off of switch S4.

Thus, in the example of operation described in relation with FIG. 6, each of switches S1 of primary bridge H1 should be controllable to the on state by control circuit 501 and should be capable, after having turned on, of automatically turning back off when the current flowing therethrough takes a zero value.

FIGS. 7A and 7B schematically illustrate an embodiment of a switch S1 of primary bridge H1 adapted to the operating mode described in relation with FIG. 6.

In this example, a switch Si equivalent to two MOS transistors M1 and M2 connected in anti-series by their drains (d) is considered. The sources (s) of transistors M1 and M2 respectively form the two conduction nodes K1 and K2 of switch Si. The gate (g) of transistor M1 is connected to a node CMD1 forming a first control node of switch Si. The gate (g) of transistor M2 is connected to a node CMD2 forming a second control node of switch Si.

Control circuit 501 of converter 500 is configured to, when it controls a switch Si of primary bridge H1 to the on state, start the switch so that it behaves as a diode, and thus that it can naturally turn off when the current between its conduction nodes K1 and K2 takes a zero value. To achieve this, on turning on of switch Si, circuit 501 applies a turn-on control signal to the gate of one of the two transistors M1 and M2 and maintains a turn-off signal on the gate of the other transistor.

More particularly, in the shown example, in the case where a negative current should flow between conduction nodes K1 and K2 of the switch, a positive gate-source voltage is applied to transistor M1 (voltage V1 between node CMD1 and node K1), and a zero or negative gate-source voltage is applied to transistor M2 (voltage V2 between node CMD2 and node K2). In this case, switch Si behaves as a diode having its anode connected to node K2 and its cathode connected to node K1. Such a configuration is illustrated in FIG. 7A.

In the case where a positive current should flow between conduction nodes K1 and K2 of the switch, a negative or zero gate-source voltage is applied to transistor M1 (voltage V1 between node CMD1 and node K1), and a positive gate-source voltage is applied to transistor M2 (voltage V2 between node CMD2 and node K2). In this case, switch Si behaves as a diode having its anode connected to node K1 and its cathode connected to node K2. Such a configuration is illustrated in FIG. 7B.

In the example described hereabove in relation with FIGS. 6 and 7A-7B, switches Si are controlled to the on state and are configured to automatically turn back off when the current flowing therethrough takes a zero value. As a variation, control circuit 501 is configured to detect that the current has taken a zero value in each switch Si and to control the switch to the off state when it is detected that current I_(Si) in the switch has taken a zero value.

As an example, referring again to FIG. 6, at time t1, circuit 501 controls switch S2 to the on state, while holding switches S1 and S3 in the on state and switch S4 in the off state.

Control circuit 501 is configured to detect that current I_(S1) in switch S1 has taken a zero value after time t1 of turning on of switch S2, and to control switch S1 to the off state when it is detected that current I_(S1) has taken a zero value.

Thus, at a time t2 subsequent to time t1, corresponding to the time when the current in switch S1 has taken a zero value, circuit 501 controls switch S1 to the off state.

At a time t3 subsequent to time t2, circuit 501 controls switch S4 to the on state, while holding switches S2 and S3 in the on state and switch S1 in the off state.

Control circuit 501 is configured to detect that current I_(S3) in switch S3 has taken a zero value after time t3 of turning on of switch S4, and to control switch S3 to the off state when it is detected that current I_(S3) has taken a zero value.

Thus, at a time t4 subsequent to time t3, corresponding to the time when the current in switch S3 has taken a zero value, circuit 501 controls switch S3 to the off state.

FIG. 8 schematically and partially illustrates an embodiment of control circuit 501 of converter 500 of FIG. 5. FIG. 8 more particularly illustrates a switch Si of primary bridge H1 of the converter, as well as a control circuit associated with this switch. The control circuit shown in FIG. 8 corresponds to a portion of control circuit 501 of FIG. 5. As an example, each of switches S1, S2, S3, S4 of primary bridge H1 of the converter is associated with a specific control circuit of the type described in relation with FIG. 8.

The control circuit of FIG. 8 comprises, coupled with switch Si, for example, in series with switch Si, a circuit 801 for detecting that the current in switch Si has taken a zero value.

Stage 801 supplies a logic output signal indicating whether the current in switch Si is or not considered as having a zero value.

The control circuit of FIG. 8 further comprises a circuit 803 receiving the logic output signal of stage 801, and further receiving an external control signal CMD_(EXT), supplied by a centralized control circuit (not detailed) of circuit 501 of FIG. 5. Circuit 803 carries out a logic operation between the output signal of circuit 801 and external control signal CMD_(EXT), and supplies a logic signal for controlling switch Si, corresponding to the result of this operation. As an example, to switch bridge H1 from the first configuration (diagonal S1, S3 conductive and diagonal S2, S4 non-conductive) to the second configuration (diagonal S1, S3 non-conductive and diagonal S2, S4 conductive), the centralized control circuit of circuit 501 simultaneously sends, at time t1, an order to turn on switch S2 and an order to allow the turning off of switch S1, via inputs CMD_(EXT) of the circuits 803 associated with switches S2 and S1, respectively. At time t3, the centralized control circuit of circuit 501 simultaneously sends an order to turn on switch S4 and an order to allow the turning off of switch S3, via inputs CMD_(EXT) of the circuits 803 associated with switches S3 and S4, respectively.

For each switch Si, when the circuit 803 associated with the switch receives an order to turn on the switch, it directly applies a turn-on control signal on its output, without taking into account the output signal of stage 801.

When the logic circuit 803 associated with a switch Si receives a turn-off authorization order, it starts by holding on its output a signal for controlling the switch to the on state as long as the output signal of circuit 801 does not indicate that the current in switch Si has taken a zero value, after which it applies on its output a signal for controlling switch Si to the off state only when the output signal of circuit 801 indicates that the current in the switch has taken a zero value.

The control circuit of FIG. 8 further comprises a circuit 805 for adapting the level of the control signal of switch Si, for example, a voltage and/or current amplifier (to be able to charge the gate in the case of a MOS switch), having its input coupled to the output of circuit 803 and having its output coupled to a control node of switch Si. Circuit 805 is capable of transposing the logic control signal supplied by circuit 803 into a signal having a level capable of effectively controlling the switch.

FIG. 9 is a more detailed diagram of an embodiment of the circuit of FIG. 8. The circuit of FIG. 9 shows the same elements as the circuit of FIG. 8, and illustrates in further detail an embodiment of circuit 801 for detecting that the current in switch Si has taken a zero value and of logic circuit 803 for generating the control signal of switch Si.

Circuit 801 comprises a device 901 for measuring the current flowing through the branch of bridge H1 comprising switch Si, that is, referring to FIG. 5, between nodes C and E for switch S1, between nodes C and F for switch S2, between nodes F and D for switch S3, and between nodes E and D for switch S4. In this example, current measurement device 901 supplies a voltage V_(ISi) representative of current I_(Si). In particular, in this example, the sign of voltage V_(ISI) is representative of the sign of current I_(Si). As an example, voltage V_(ISI) is proportional to current I_(Si). Current measurement device 901 is for example a Hall-effect sensor, or any other adapted current sensor. Circuit 801 further comprises, in this example, a voltage comparator 903 having a first input (+) coupled to the output of current measurement device 901 and having a second input (−) coupled to a node GND of application of a reference potential, for example, the ground. In this example, output voltage V_(ISI) of current measurement device 901 is referenced with respect to node GND. Thus, the output signal of comparator 903 is in a first state, for example, a high state, when current I_(Si) flows in a first direction, and in a second state, for example, a low state, when current I_(Si) flows in the opposite direction. In this example, the output signal of stage 801 corresponds to the output signal of comparator 801.

In the example of FIG. 9, logic circuit 803 comprises two D flip-flops 911 and 913. Each D flip-flop comprises a first input node d, a second input node ck, a third input node set, and an output node q. Each D flip-flop operates as follows. When the binary signal applied to the set input node of the flip-flop is in a first state, for example, in the low state, for each rising edge of the binary signal applied to input node ck, the binary signal applied to input node d is copied and stored on the q output node. When the binary signal applied to the set input node of the flip-flop is in a second state, for example, in the high state, the signal supplied on the q output node is forced to a predetermined state, for example, to the high state, independently from the states of the signals applied to input nodes d and ck.

In this example, a binary signal in the low state (‘0’) is permanently applied to the d input nodes of flip-flops 911 and 913. As an example, the d input nodes of flip-flops 911 and 913 are coupled to a node of application of a reference potential, for example, node GND. The ck input node ck of flip-flop 911 is directly coupled to the output of comparator 903, while the ck input node of flip-flop 913 is coupled to the output of comparator 903 via an inverter. The set input nodes of flip-flops 911 and 913 are coupled to a node of application of external control signal CMD_(EXT).

Logic circuit 803 of FIG. 9 further comprises an AND logic gate 915 with two inputs and one output. The first and second inputs of the AND gate are respectively coupled to the q output node of D flip-flop 911 and to the q output node of D flip-flop 913. The output of the AND gate forms the output of circuit 803 and is coupled to the input of circuit 805.

The control circuit of switch Si of FIG. 9 operates as follows. To control switch Si to the on state, control signal CMD_(EXT) is set to the high state. The binary signal supplied to the q output nodes of flip-flops 911 and 913 then are in the high state. Thus, the output signal of AND gate 915 is in the high state, and the switch is held in the on (conductive) state. To allow the automatic turning back off of switch Si, signal CMD_(EXT) is set to the low state. First, the q outputs of flip-flops 911 and 913 remain in the high state, so that switch Si remains on. When current I_(Si) in switch Si reverses, the output signal of comparator 903 switches state. As a result, the output signal of one of the two flip-flops 911 and 913 switches to the low state. Thus, the output signal of AND gate 915 switches to the low state, which causes the turning off of switch Si.

Specific embodiments have been described. Various alterations, modifications, and improvements will occur to those skilled in the art. In particular, the described embodiments are not limited to the examples of numerical values mentioned as an example in the present description.

It should further be noted that the control circuit described in relation with FIGS. 8 and 9, enabling to control a switch to either force its turning on or have it automatically turn off when the current flowing therethrough takes a zero value, may advantageously be used for other applications than the AC/DC converter described in relation with FIGS. 5 and 6. As an example, such a circuit may be used to control a switch of a three-phase inverter, or more generally for any application capable of taking advantage of the automatic turning off of a switch when the current flowing therethrough takes a zero value.

Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and the scope of the present invention. Accordingly, the foregoing description is by way of example only and is not intended to be limiting. The present invention is limited only as defined in the following claims and the equivalents thereto. 

What is claimed is:
 1. An AC-voltage-to-DC-voltage conversion circuit, comprising: four first bidirectional switches forming a first H bridge, first and second input nodes of the bridge being respectively coupled to first and second nodes of application of the AC voltage; a transformer comprising a primary winding and a secondary winding, magnetically coupled, first and second ends of the primary winding being respectively coupled to first and second output nodes of the first bridge; a first inductance series-connected with the first bridge between the first input node of the bridge and the first node of application of the AC voltage; a second inductance series-connected with the first bridge, between the first output node of the bridge and the first end of the primary winding; and a control circuit capable of controlling the bridge alternately to a first configuration where the switches of a first diagonal of the bridge are on and the switches of a second diagonal of the bridge are off, and to a second configuration where the switches of the first diagonal are off and the switches of the second diagonal are on, the control circuit being capable, during a phase of transition between the first and second configurations, of successively: turning on a first switch of the second diagonal; turning off a first switch of the first diagonal when the current flowing through this switch takes a zero value; turning on the second switch of the second diagonal; and turning off the second switch of the first diagonal when the current flowing through this switch takes a zero value.
 2. The conversion circuit of claim 1, further comprising four second switches forming a second H bridge, first and second input nodes of the second bridge being respectively coupled to first and second ends of the secondary winding of the transformer, and first and second output nodes of the second bridge being respectively coupled to first and second DC voltage supply nodes.
 3. The conversion circuit of claim 2, wherein the control circuit is capable of controlling the second bridge alternately to a first configuration where the switches of a first diagonal of the bridge are on and the switches of a second diagonal of the bridge are off, and to a second configuration where the switches of the first diagonal are off and the switches of the second diagonal are on.
 4. The conversion circuit of claim 3, wherein the control circuit is configured to switch the first bridge between its first and second configurations and to switch the second bridge between its first and second configurations substantially at the same frequency.
 5. The conversion circuit of claim 1, wherein the control circuit is configured to switch the first bridge between its first and second configurations at a frequency greater than or equal to 1 MHz.
 6. The conversion circuit of claim 1, wherein each first switch is capable of being controlled to the on state by the control circuit and of automatically turning off when the current flowing therethrough takes a zero value.
 7. The conversion circuit of claim 1, wherein each first switch is equivalent to an anti-series association of first and second MOS transistors connected by their drains, the sources of the first and second transistors respectively forming the conduction nodes of the switch, and the gates of the first and second MOS transistors forming first and second switch control nodes.
 8. The conversion circuit of claim 7, wherein the control circuit is configured to, when it controls a switch of the first bridge to the on state, apply a turn-on control signal to the gate of one of the first and second transistors of the switch and hold a blocking signal on the gate of the other transistor.
 9. The conversion circuit of claim 8, wherein the control circuit is configured to, when it controls a switch of the first bridge to the on state, apply a turn-on control signal to the gate of the first transistor and a turn-off signal to the gate of the second transistor when the current to be conducted by the switch has a first biasing, and apply a turn-on control signal to the gate of the second transistor and a turn-off signal to the gate of the first transistor when the current to be conducted by the switch has a second biasing opposite to the first biasing.
 10. The conversion circuit of claim 1, wherein the control circuit comprises, for each first switch: a first circuit capable of detecting that the current in the switch has taken a zero value and of supplying a logic output signal corresponding to the result of this detection; a second circuit capable of performing a logic operation between the signal supplied by the first circuit and an external switch control signal and of supplying a logic switch control signal corresponding to the result of this operation.
 11. The conversion circuit of claim 10, wherein, for each first switch, the first circuit of the control circuit comprises a device for measuring the current flowing through the switch and a comparator configured to compare an output signal of the current measurement device with a reference signal.
 12. The conversion circuit of claim 11, wherein, for each first switch, the second circuit of the control circuit comprises first and second D flip-flops each comprising first, second, and third input nodes, and an output node, each D flip-flop being capable of: when a binary signal in a first state is applied to its third input node, copying on its output node, on each rising edge of a binary signal applied to its second input node, a binary signal applied to its first input node; when a binary signal in a second state is applied to its third input node, forcing the binary signal supplied on its output node to a predetermined state independently from the states of the signals applied to its first and second input nodes.
 13. The conversion circuit of claim 12, wherein, for each first switch: each D flip-flop has its first input node coupled to a node of application of a fixed binary signal in a first state; each D flip-flop has its third input node coupled to a node of application of the external switch control signal; and the first D flip-flop has its second input node coupled to the output of the comparator and the second D flip-flop has its second input node coupled to the output of the comparator via an inverter.
 14. The conversion circuit of claim 13, wherein, for each first switch, the second circuit of the control circuit comprises an AND gate having a first input coupled to the output node of the first D flip-flop, a second input coupled to the output node of the second D flip-flop, and an output coupled to a node for supplying the logic output signal of the second circuit.
 15. The conversion circuit of claim 1, wherein the first switches are gallium nitride switches. 